Nakajima Anri

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Biomolecule detection based on Si single-electron transistors for highly sensitive integrated sensors on a single chip

Creator	Kudo Takashi \| Nakajima Anri
Journal	Applied Physics Letters Volume 100 Issue 2 pp. 023704 -
Date of Issued	published_at 2012

Highly sensitive ion detection using Si single-electron transistors

Creator	Kudo Takashi \| Nakajima Anri
Journal	Applied Physics Letters Volume 98 Issue 12 pp. 123705 -
Date of Issued	published_at 2011

Functional gate metal-oxide-semiconductor field-effect transistors using tunnel injection/ejection of trap charges enabling self-adjustable threshold voltage for ultralow power operation

Creator	Nakajima Anri \| Kudo Takashi \| Ito Takashi
Journal	Applied Physics Letters Volume 98 Issue 5 pp. 053501 -
Date of Issued	published_at 2011

Influence of bulk bias on negative bias temperature instability of p-channel metal-oxide-semiconductor field-effect transistors with ultrathin SiON gate dielectrics

Creator	Zhu Shiyang \| Nakajima Anri \| Ohashi Takuo \| Miyake Hideharu
Journal	Journal of Applied Physics Volume 99 Issue 6
Date of Issued	published_at 2006-05-15

Periodic Coulomb oscillations in Si single-electron transistor based on multiple islands

Creator	Ohkura Kensaku \| Kitade Tetsuya \| Nakajima Anri
Journal	Journal of Applied Physics Volume 98 Issue 12
Date of Issued	published_at 2005-12-15

Interface trap and oxide charge generation under negative bias temperature instability of p-channel metal-oxide-semiconductor field-effect transistors with ultrathin plasma-nitrided SiON gate dielectrics

Creator	Zhu Shiyang \| Nakajima Anri \| Ohashi Takuo \| Miyake Hideharu
Journal	Journal of Applied Physics Volume 98 Issue 11
Date of Issued	published_at 2005-12-01

Cotunneling current in Si single-electron transistor based on multiple islands

Creator	Ohkura Kensaku \| Kitade Tetsuya \| Nakajima Anri
Journal	Applied Physics Letters Volume 89 Issue 18
Date of Issued	published_at 2006-10-30

Room-temperature operation of an exclusive-OR circuit using a highly doped Si single-electron transistor

Creator	Kitade Tetsuya \| Ohkura Kensaku \| Nakajima Anri
Journal	Applied Physics Letters Volume 86 Issue 12
Date of Issued	published_at 2005-05-21

Abnormal enhancement of interface trap generation under dynamic oxide field stress at MHz region

Creator	Zhu Shiyang \| Nakajima Anri
Journal	Applied Physics Letters Volume 86 Issue 8
Date of Issued	published_at 2005-02-21

Atomic-layer-deposited silicon-nitride/SiO2 stacked gate dielectrics for highly reliable p-metal–oxide–semiconductor field-effect transistors

Creator	Nakajima Anri \| Yoshimoto Takashi \| Kidera Toshiro \| Obata Katsunori \| Yokoyama Shin \| Sunami Hideo \| Hirose Masataka
Journal	Applied Physics Letters Volume 77 Issue 18 pp. 2855 - 2857
Date of Issued	published_at 2000-10-30

Characterization of silicon/oxide/nitride layers by x-ray photoelectron spectroscopy

Creator	Hansch Walter \| Nakajima Anri \| Yokoyama Shin
Journal	Applied Physics Letters Volume 75 Issue 11 pp. 1535 - 1537
Date of Issued	published_at 1999-09-13

Growth and electrical properties of atomic-layer deposited ZrO2 /Si-nitride stack gate dielectrics

Creator	Ishii Hiroyuki \| Nakajima Anri \| Yokoyama Shin
Journal	Journal of Applied Physics Volume 95 Issue 2 pp. 536 - 542
Date of Issued	published_at 2004-01-15

Coulomb blockade effects and conduction mechanism in extremely thin polycrystalline-silicon wires

Creator	Kawamura Kensaku \| Kidera Toshiro \| Nakajima Anri \| Yokoyama Shin
Journal	Journal of Applied Physics Volume 91 Issue 8 pp. 5213 - 5220
Date of Issued	published_at 2002-04-15

Conduction mechanism of Si single-electron transistor having a one-dimensional regular array of multiple tunnel junctions

Creator	Nakajima Anri \| Ito Yuhei \| Yokoyama Shin
Journal	Applied Physics Letters Volume 81 Issue 4 pp. 733 - 735
Date of Issued	published_at 2002-07-22

Fabrication of Si single-electron transistors having double SiO2 barriers

Creator	Ito Yuhei \| Hatano Tsuyoshi \| Nakajima Anri \| Yokoyama Shin
Journal	Applied Physics Letters Volume 80 Issue 24 pp. 4617 - 4619
Date of Issued	published_at 2002-06-17

Reliable extraction of the energy distribution of Si/SiO2 interface traps in ultrathin metal–oxide–semiconductor structures

Creator	Khosru Quazi Deen Mohd \| Nakajima Anri \| Yoshimoto Takashi \| Yokoyama Shin
Journal	Applied Physics Letters Volume 80 Issue 21 pp. 3952 - 3954
Date of Issued	published_at 2002-05-27

NH3-annealed atomic-layer-deposited silicon nitride as a high-k gate dielectric with high reliability

Creator	Nakajima Anri \| Khosru Quazi Deen Mohd \| Yoshimoto Takashi \| Kidera Toshirou \| Yokoyama Shin
Journal	Applied Physics Letters Volume 80 Issue 7 pp. 1252 - 1254
Date of Issued	published_at 2002-02-18

Soft-breakdown-suppressed ultrathin atomic-layer-deposited silicon–nitride/SiO2 stack gate dielectrics for advanced complementary metal–oxide–semiconductor technology

Creator	Khosru Quazi Deen Mohd \| Nakajima Anri \| Yoshimoto Takashi \| Yokoyama Shin
Journal	Applied Physics Letters Volume 79 Issue 21 pp. 3488 - 3490
Date of Issued	published_at 2001-11-19

Low-temperature formation of silicon nitride gate dielectrics by atomic-layer deposition

Creator	Nakajima Anri \| Yoshimoto Takashi \| Kidera Toshirou \| Yokoyama Shin
Journal	Applied Physics Letters Volume 79 Issue 5 pp. 665 - 667
Date of Issued	published_at 2001-07-30

Self-limiting atomic-layer deposition of Si on SiO2 by alternate supply of Si2H6 and SiCl4

Creator	Yokoyama Shin \| Ohba Kenji \| Nakajima Anri
Journal	Applied Physics Letters Volume 79 Issue 5 pp. 617 - 619
Date of Issued	published_at 2001-07-30

Low-temperature selective deposition of silicon on silicon nitride by time-modulated disilane flow and formation of silicon narrow wires

Creator	Yokoyama Shin \| Ohba Kenji \| Kawamura Kensaku \| Kidera Toshiro \| Nakajima Anri
Journal	Applied Physics Letters Volume 79 Issue 4 pp. 494 - 496
Date of Issued	published_at 2001-07-23

Interface trap generation induced by charge pumping current under dynamic oxide field stresses

Creator	Zhu Shiyang \| Nakajima Anri \| Ohashi Takuo \| Miyake Hideharu
Journal	IEEE Electron Device Letters Volume 26 Issue 3 pp. 216 - 218
Date of Issued	published_at 2005-03

Enhancement of BTI degradation in pMOSFETs under high-frequency bipolar gate bias

Creator	Zhu Shiyang \| Nakajima Anri \| Ohashi Takuo \| Miyake Hideharu
Journal	IEEE Electron Device Letters Volume 26 Issue 6 pp. 387 - 389
Date of Issued	published_at 2005-06

Atomic layer-deposited Si-nitride/SiO2 stack gate dielectrics for future high-speed DRAM with enhanced reliability

Creator	Nakajima Anri \| Ohashi Takuo \| Zhu Shiyang \| Yokoyama Shigeyuki \| Michimata Shigetomi \| Miyake Hideharu
Journal	IEEE Electron Device Letters Volume 26 Issue 8 pp. 538 - 540
Date of Issued	published_at 2005-08

Pulse waveform dependence on AC bias temperature instability in pMOSFETs

Creator	Zhu Shiyang \| Nakajima Anri \| Ohashi Takuo \| Miyake Hideharu
Journal	IEEE Electron Device Letters Volume 26 Issue 9 pp. 658 - 660
Date of Issued	published_at 2005-09

Mechanism of dynamic bias temperature instability in p- and nMOSFETs: The effect of pulse waveform

Creator	Zhu Shiyang \| Nakajima Anri \| Ohashi Takuo \| Miyake Hideharu
Journal	IEEE Transactions on Electron Devices Volume 53 Issue 8 pp. 1805 - 1814
Date of Issued	published_at 2006-08