Low-temperature selective deposition of silicon on silicon nitride by time-modulated disilane flow and formation of silicon narrow wires
Applied Physics Letters 79 巻 4 号
494-496 頁
2001-07-23 発行
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| ファイル情報(添付) | |
| タイトル ( eng ) |
Low-temperature selective deposition of silicon on silicon nitride by time-modulated disilane flow and formation of silicon narrow wires
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| 作成者 |
Ohba Kenji
Kawamura Kensaku
Kidera Toshiro
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| 収録物名 |
Applied Physics Letters
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| 巻 | 79 |
| 号 | 4 |
| 開始ページ | 494 |
| 終了ページ | 496 |
| 抄録 |
The low-temperature (410 °C) selective deposition of Si on silicon nitride has been achieved by means of the time-modulated flow of disilane while a very small amount of Si is deposited on SiO2. Very narrow (21 nm width and 28 nm thick) Si wires have been fabricated using the selective deposition. The resistivity of the Si wires fabricated by the selective deposition is much smaller (∼1/5) than that fabricated by the conventional reactive ion etching followed by annealing. This technique will be applicable to the formation of a polycrystalline silicon gate with small resistivity for the high-performance ultrasmall metal–oxide–semiconductor transistors and quantum effect devices.
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| 言語 |
英語
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| 資源タイプ | 学術雑誌論文 |
| 出版者 |
American Institute of Physics
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| 発行日 | 2001-07-23 |
| 権利情報 |
Copyright (c) 2001 American Institute of Physics.
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| 出版タイプ | Version of Record（出版社版。早期公開を含む） |
| アクセス権 | オープンアクセス |
| 収録物識別子 |
[ISSN] 0003-6951
[DOI] 10.1063/1.1387260
[NCID] AA00543431
[DOI] http://dx.doi.org/10.1063/1.1387260
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