Low-temperature formation of silicon nitride gate dielectrics by atomic-layer deposition

Nakajima Anri

Yoshimoto Takashi

Kidera Toshirou

Yokoyama Shin

Applied Physics Letters

Thin (equivalent oxide thickness Teq of 2.4 nm) silicon nitride layers were deposited on Si substrates by an atomic-layer-deposition (ALD) technique at low temperatures (<550°C). The interface state density at the ALD silicon nitride/Si-substrate interface was almost the same as that of the gate SiO2. No hysteresis was observed in the gate capacitance-gate voltage characteristics. The gate leakage current was the level comparable with that through SiO2 of the same Teq. The conduction mechanism of the leakage current was investigated and was found to be the direct tunneling. The ALD technique allows us to fabricate an extremely thin, very uniform silicon nitride layer with atomic-scale control for the near-future gate dielectrics.

英語

American Institute of Physics

Copyright (c) 2001 American Institute of Physics.

[ISSN] 0003-6951

[DOI] 10.1063/1.1388026

[NCID] AA00543431

[DOI] http://dx.doi.org/10.1063/1.1388026