NH3-annealed atomic-layer-deposited silicon nitride as a high-k gate dielectric with high reliability
Applied Physics Letters Volume 80 Issue 7
Page 1252-1254
published_at 2002-02-18
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| File | |
| Title ( eng ) |
NH3-annealed atomic-layer-deposited silicon nitride as a high-k gate dielectric with high reliability
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| Creator |
Khosru Quazi Deen Mohd
Yoshimoto Takashi
Kidera Toshirou
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| Source Title |
Applied Physics Letters
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| Volume | 80 |
| Issue | 7 |
| Start Page | 1252 |
| End Page | 1254 |
| Abstract |
Extremely thin (equivalent oxide thickness, Teq = 1.2 nm) silicon-nitride high-k (er = 7.2) gate dielectrics have been formed at low temperatures (<550 °C) by an atomic-layer-deposition (ALD) technique with subsequent NH3 annealing at 550 °C. A remarkable reduction in leakage current, especially in the low dielectric voltage region, which will be the operating voltage for future technologies, has made it a highly potential gate dielectric for future ultralarge-scale integrated devices. Suppressed soft breakdown events are observed in ramped voltage stressing. This suppression is thought to be due to a strengthened structure of Si–N bonds and the smoothness and uniformity at the poly-Si/ALD-silicon-nitride interface.
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| Language |
eng
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| Resource Type | journal article |
| Publisher |
American Institute of Physics
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| Date of Issued | 2002-02-18 |
| Rights |
Copyright (c) 2002 American Institute of Physics.
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| Publish Type | Version of Record |
| Access Rights | open access |
| Source Identifier |
[ISSN] 0003-6951
[DOI] 10.1063/1.1447314
[NCID] AA00543431
[DOI] http://dx.doi.org/10.1063/1.1447314
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