Graph Rewriting Approaches to Convert Asynchronous Read Operation into Synchronous One for Embedded Memory in FPGAs

アクセス数 : 713 件

ダウンロード数 : 185 件

今月のアクセス数 : 4 件

今月のダウンロード数 : 2 件

この文献の参照には次のURLをご利用ください : https://ir.lib.hiroshima-u.ac.jp/00034068

File	diss_ko5942.pdf 558 KB 種類 : fulltext
Title ( eng )	Graph Rewriting Approaches to Convert Asynchronous Read Operation into Synchronous One for Embedded Memory in FPGAs
Title ( jpn )	FPGAの組込みメモリに対する非同期読出しの同期読出し変換のためのグラフ書換えアプローチ
Creator	Mondal Md. Nazrul Islam
NDC	Electrical engineering [ 540 ]
Language	eng
Resource Type	doctoral thesis
Rights	Copyright(c) by Author
Access Rights	open access
Source Identifier	[J-1] Md. Nazrul Islam Mondal, Koji Nakano, Yasuaki Ito, A Rewriting Approach to Replace Asynchronous ROMs with Synchronous Ones for the Circuits with Cycles, International Journal of Networking and Computing, Vol. 2, No.2, pp.269-290, July 2012. references [J-2] Md. Nazrul Islam Mondal, Koji Nakano, Yasuaki Ito, An Algorithm to Obtain Circuits with Synchronous RAMs, Journal of Communication and Computer, Vol. 9, No.5, pp.547-559, May 2012. references [J-3] Md. Nazrul Islam Mondal, Koji Nakano, Yasuaki Ito, A Graph Rewriting Approach for Converting Asynchronous ROMs into Synchronous Ones, IEICE Transactions on Information and Systems, Vol. E94-D, No.12, pp.2378-2388, December 2011. references [URI] http://www.ijnc.org/index.php/ijnc/article/view/48 references [URI] http://www.davidpublishing.com/show.html?5750 references [DOI] http://dx.doi.org/10.1587/transinf.E94.D.2378 references
Dissertation Number	甲第5942号
Degree Name	Engineering
Date of Granted	2012-09-25
Degree Grantors	広島大学