Pulse waveform dependence on AC bias temperature instability in pMOSFETs

Zhu Shiyang

Nakajima Anri

Ohashi Takuo

Miyake Hideharu

IEEE Electron Device Letters

In this letter, the waveform effects on the degradation enhancement of pMOSFETs under high-frequency (≥ 10[4] Hz) bipolar-pulsed bias-temperature (BT) stresses were systematically studied. The enhancement was found to be mainly governed by the fall time (tF) of the pulse waveform, namely, the transition time of the silicon surface potential from strong accumulation to strong inversion, rather than the pulse rise time (tR) and the pulse duty factor (D). The enhancement decreases significantly with tF increasing, and is almost eliminated when tF is larger than ∼60 ns. This new finding is consistent with our newly proposed assumption that the recombination of free holes and trapped electrons at the SiO2/Si interface and/or near-interface states can enhance the interface trap generation.

Bias temperature instability (BTI)

Dynamic stress

Interface trap generation

pMOSFET

Pulse waveform

Electrical engineering [ 540 ]

eng

IEEE

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[ISSN] 0741-3106

[DOI] 10.1109/LED.2005.853645

[NCID] AA00231428

[DOI] http://dx.doi.org/10.1109/LED.2005.853645