Influence of bulk bias on negative bias temperature instability of p-channel metal-oxide-semiconductor field-effect transistors with ultrathin SiON gate dielectrics

Journal of Applied Physics Volume 99 Issue 6 published_at 2006-05-15
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Title ( eng )
Influence of bulk bias on negative bias temperature instability of p-channel metal-oxide-semiconductor field-effect transistors with ultrathin SiON gate dielectrics
Creator
Zhu Shiyang
Ohashi Takuo
Miyake Hideharu
Source Title
Journal of Applied Physics
Volume 99
Issue 6
Abstract
Bulk (well) bias effects (grounded, positively biased, and floating) on both static and dynamic negative bias temperature instability of p -channel metal-oxide-semiconductor field-effect transistors with ultrathin SiON gate dielectrics were systematically investigated. The device degradation under both static and dynamic negative bias temperature (NBT) stresses with relatively large gate voltage (Vg) is significantly enhanced by a positive bulk bias (Vb). Moreover, the device degradation under bipolar pulsed bias temperature (BT) stress is dramatically enhanced by floating the bulk electrode. Both phenomena can be attributed to an additional degradation related to hot hole injection. The holes are energized by an electrical field of the induced depletion region between channel and bulk provided by the positive Vb or, in the case of bipolar pulsed BT stress with the bulk electrode floating, by the transient depletion region below the channel induced by the p-n junction between source (drain) and bulk upon the gate voltage Vg being switched from positive to negative with a transition time less than about 0.2-100 ms.
Language
eng
Resource Type journal article
Publisher
American Institute of Physics
Date of Issued 2006-05-15
Rights
Copyright (c) 2006 American Institute of Physics.
Publish Type Version of Record
Access Rights open access
Source Identifier
[ISSN] 0021-8979
[DOI] 10.1063/1.2183409
[NCID] AA00693547
[DOI] http://dx.doi.org/10.1063/1.2183409