Influence of bulk bias on negative bias temperature instability of p-channel metal-oxide-semiconductor field-effect transistors with ultrathin SiON gate dielectrics
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ID | 18602 |
本文ファイル | |
著者 |
Zhu, Shiyang
Ohashi, Takuo
Miyake, Hideharu
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抄録(英) | Bulk (well) bias effects (grounded, positively biased, and floating) on both static and dynamic negative bias temperature instability of p -channel metal-oxide-semiconductor field-effect transistors with ultrathin SiON gate dielectrics were systematically investigated. The device degradation under both static and dynamic negative bias temperature (NBT) stresses with relatively large gate voltage (Vg) is significantly enhanced by a positive bulk bias (Vb). Moreover, the device degradation under bipolar pulsed bias temperature (BT) stress is dramatically enhanced by floating the bulk electrode. Both phenomena can be attributed to an additional degradation related to hot hole injection. The holes are energized by an electrical field of the induced depletion region between channel and bulk provided by the positive Vb or, in the case of bipolar pulsed BT stress with the bulk electrode floating, by the transient depletion region below the channel induced by the p-n junction between source (drain) and bulk upon the gate voltage Vg being switched from positive to negative with a transition time less than about 0.2-100 ms.
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掲載誌名 |
Journal of Applied Physics
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巻 | 99巻
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号 | 6号
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出版年月日 | 2006-05-15
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出版者 | American Institute of Physics
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ISSN | 0021-8979
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NCID | |
出版者DOI | |
言語 |
英語
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NII資源タイプ |
学術雑誌論文
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広大資料タイプ |
学術雑誌論文
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DCMIタイプ | text
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フォーマット | application/pdf
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著者版フラグ | publisher
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権利情報 | Copyright (c) 2006 American Institute of Physics.
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関連情報URL | |
部局名 |
ナノデバイス・システム研究センター
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