Pulse waveform dependence on AC bias temperature instability in pMOSFETs
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ID | 15049 |
本文ファイル | |
著者 |
Zhu, Shiyang
Ohashi, Takuo
Miyake, Hideharu
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キーワード | Bias temperature instability (BTI)
Dynamic stress
Interface trap generation
pMOSFET
Pulse waveform
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NDC |
電気工学
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抄録(英) | In this letter, the waveform effects on the degradation enhancement of pMOSFETs under high-frequency (≥ 10[4] Hz) bipolar-pulsed bias-temperature (BT) stresses were systematically studied. The enhancement was found to be mainly governed by the fall time (tF) of the pulse waveform, namely, the transition time of the silicon surface potential from strong accumulation to strong inversion, rather than the pulse rise time (tR) and the pulse duty factor (D). The enhancement decreases significantly with tF increasing, and is almost eliminated when tF is larger than ∼60 ns. This new finding is consistent with our newly proposed assumption that the recombination of free holes and trapped electrons at the SiO2/Si interface and/or near-interface states can enhance the interface trap generation.
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掲載誌名 |
IEEE Electron Device Letters
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巻 | 26巻
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号 | 9号
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開始ページ | 658
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終了ページ | 660
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出版年月日 | 2005-09
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出版者 | IEEE
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ISSN | 0741-3106
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NCID | |
出版者DOI | |
言語 |
英語
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NII資源タイプ |
学術雑誌論文
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広大資料タイプ |
学術雑誌論文
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DCMIタイプ | text
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フォーマット | application/pdf
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著者版フラグ | publisher
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権利情報 | Copyright (c) 2005 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
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関連情報URL | |
部局名 |
ナノデバイス・システム研究センター
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