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ID 15049
file
creator
Zhu, Shiyang
Ohashi, Takuo
Miyake, Hideharu
subject
Bias temperature instability (BTI)
Dynamic stress
Interface trap generation
pMOSFET
Pulse waveform
NDC
Electrical engineering
abstract
In this letter, the waveform effects on the degradation enhancement of pMOSFETs under high-frequency (≥ 10[4] Hz) bipolar-pulsed bias-temperature (BT) stresses were systematically studied. The enhancement was found to be mainly governed by the fall time (tF) of the pulse waveform, namely, the transition time of the silicon surface potential from strong accumulation to strong inversion, rather than the pulse rise time (tR) and the pulse duty factor (D). The enhancement decreases significantly with tF increasing, and is almost eliminated when tF is larger than ∼60 ns. This new finding is consistent with our newly proposed assumption that the recombination of free holes and trapped electrons at the SiO2/Si interface and/or near-interface states can enhance the interface trap generation.
journal title
IEEE Electron Device Letters
volume
Volume 26
issue
Issue 9
start page
658
end page
660
date of issued
2005-09
publisher
IEEE
issn
0741-3106
ncid
publisher doi
language
eng
nii type
Journal Article
HU type
Journal Articles
DCMI type
text
format
application/pdf
text version
publisher
rights
Copyright (c) 2005 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
relation url
department
Research Center for Nanodevices and Systems