Influence of bulk bias on negative bias temperature instability of p-channel metal-oxide-semiconductor field-effect transistors with ultrathin SiON gate dielectrics
Use this link to cite this item : https://ir.lib.hiroshima-u.ac.jp/00018602
ID | 18602 |
file | |
creator |
Zhu, Shiyang
Ohashi, Takuo
Miyake, Hideharu
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abstract | Bulk (well) bias effects (grounded, positively biased, and floating) on both static and dynamic negative bias temperature instability of p -channel metal-oxide-semiconductor field-effect transistors with ultrathin SiON gate dielectrics were systematically investigated. The device degradation under both static and dynamic negative bias temperature (NBT) stresses with relatively large gate voltage (Vg) is significantly enhanced by a positive bulk bias (Vb). Moreover, the device degradation under bipolar pulsed bias temperature (BT) stress is dramatically enhanced by floating the bulk electrode. Both phenomena can be attributed to an additional degradation related to hot hole injection. The holes are energized by an electrical field of the induced depletion region between channel and bulk provided by the positive Vb or, in the case of bipolar pulsed BT stress with the bulk electrode floating, by the transient depletion region below the channel induced by the p-n junction between source (drain) and bulk upon the gate voltage Vg being switched from positive to negative with a transition time less than about 0.2-100 ms.
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journal title |
Journal of Applied Physics
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volume | Volume 99
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issue | Issue 6
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date of issued | 2006-05-15
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publisher | American Institute of Physics
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issn | 0021-8979
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ncid | |
publisher doi | |
language |
eng
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nii type |
Journal Article
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HU type |
Journal Articles
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DCMI type | text
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format | application/pdf
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text version | publisher
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rights | Copyright (c) 2006 American Institute of Physics.
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relation url | |
department |
Research Center for Nanodevices and Systems
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