Low-temperature selective deposition of silicon on silicon nitride by time-modulated disilane flow and formation of silicon narrow wires
Use this link to cite this item : https://ir.lib.hiroshima-u.ac.jp/00018584
ID | 18584 |
file | |
creator |
Ohba, Kenji
Kawamura, Kensaku
Kidera, Toshiro
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abstract | The low-temperature (410 °C) selective deposition of Si on silicon nitride has been achieved by means of the time-modulated flow of disilane while a very small amount of Si is deposited on SiO2. Very narrow (21 nm width and 28 nm thick) Si wires have been fabricated using the selective deposition. The resistivity of the Si wires fabricated by the selective deposition is much smaller (∼1/5) than that fabricated by the conventional reactive ion etching followed by annealing. This technique will be applicable to the formation of a polycrystalline silicon gate with small resistivity for the high-performance ultrasmall metal–oxide–semiconductor transistors and quantum effect devices.
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journal title |
Applied Physics Letters
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volume | Volume 79
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issue | Issue 4
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start page | 494
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end page | 496
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date of issued | 2001-07-23
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publisher | American Institute of Physics
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issn | 0003-6951
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ncid | |
publisher doi | |
language |
eng
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nii type |
Journal Article
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HU type |
Journal Articles
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DCMI type | text
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format | application/pdf
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text version | publisher
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rights | Copyright (c) 2001 American Institute of Physics.
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relation url | |
department |
Research Center for Nanodevices and Systems
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