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ID 18584
file
creator
Ohba, Kenji
Kawamura, Kensaku
Kidera, Toshiro
abstract
The low-temperature (410 °C) selective deposition of Si on silicon nitride has been achieved by means of the time-modulated flow of disilane while a very small amount of Si is deposited on SiO2. Very narrow (21 nm width and 28 nm thick) Si wires have been fabricated using the selective deposition. The resistivity of the Si wires fabricated by the selective deposition is much smaller (∼1/5) than that fabricated by the conventional reactive ion etching followed by annealing. This technique will be applicable to the formation of a polycrystalline silicon gate with small resistivity for the high-performance ultrasmall metal–oxide–semiconductor transistors and quantum effect devices.
journal title
Applied Physics Letters
volume
Volume 79
issue
Issue 4
start page
494
end page
496
date of issued
2001-07-23
publisher
American Institute of Physics
issn
0003-6951
ncid
publisher doi
language
eng
nii type
Journal Article
HU type
Journal Articles
DCMI type
text
format
application/pdf
text version
publisher
rights
Copyright (c) 2001 American Institute of Physics.
relation url
department
Research Center for Nanodevices and Systems



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