Pulse waveform dependence on AC bias temperature instability in pMOSFETs
IEEEElectDevLett_26_658.pdf 182 KB
Bias temperature instability (BTI)
Interface trap generation
In this letter, the waveform effects on the degradation enhancement of pMOSFETs under high-frequency (≥ 10 Hz) bipolar-pulsed bias-temperature (BT) stresses were systematically studied. The enhancement was found to be mainly governed by the fall time (tF) of the pulse waveform, namely, the transition time of the silicon surface potential from strong accumulation to strong inversion, rather than the pulse rise time (tR) and the pulse duty factor (D). The enhancement decreases significantly with tF increasing, and is almost eliminated when tF is larger than ∼60 ns. This new finding is consistent with our newly proposed assumption that the recombination of free holes and trapped electrons at the SiO2/Si interface and/or near-interface states can enhance the interface trap generation.
IEEE Electron Device Letters
|date of issued||
Copyright (c) 2005 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
Research Center for Nanodevices and Systems
Last 12 months's access : ? times
Last 12 months's DL: ? times
This month's access: ? times
This month's DL: ? times