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ID 18586
本文ファイル
著者
Yoshimoto, Takashi
Kidera, Toshirou
抄録(英)
Thin (equivalent oxide thickness Teq of 2.4 nm) silicon nitride layers were deposited on Si substrates by an atomic-layer-deposition (ALD) technique at low temperatures (<550°C). The interface state density at the ALD silicon nitride/Si-substrate interface was almost the same as that of the gate SiO2. No hysteresis was observed in the gate capacitance-gate voltage characteristics. The gate leakage current was the level comparable with that through SiO2 of the same Teq. The conduction mechanism of the leakage current was investigated and was found to be the direct tunneling. The ALD technique allows us to fabricate an extremely thin, very uniform silicon nitride layer with atomic-scale control for the near-future gate dielectrics.
掲載誌名
Applied Physics Letters
79巻
5号
開始ページ
665
終了ページ
667
出版年月日
2001-07-30
出版者
American Institute of Physics
ISSN
0003-6951
NCID
出版者DOI
言語
英語
NII資源タイプ
学術雑誌論文
広大資料タイプ
学術雑誌論文
DCMIタイプ
text
フォーマット
application/pdf
著者版フラグ
publisher
権利情報
Copyright (c) 2001 American Institute of Physics.
関連情報URL
部局名
ナノデバイス・システム研究センター