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ID 15048
本文ファイル
著者
Zhu, Shiyang
Ohashi, Takuo
Miyake, Hideharu
キーワード
Bias temperature instability (BTI)
Direct-current current-voltage (DCIV)
Dynamic stress
Interface states
Interface trap generation
MOSFET
Reaction-diffusion (R-D) model
Reliability
NDC
電気工学
抄録(英)
The waveform effect on dynamic bias temperature instability (BTI) is systematically studied for both p- and nMOSFETs with ultrathin SiON gate dielectrics by using a modified direct-current current-voltage method to monitor the stress-induced interface trap density. Interface traps are generated at the inversion gate bias (negative for pMOSFETs and positive for nMOSFETs) and are partially recovered at the zero or accumulation gate bias. Devices under high-frequency bipolar stress exhibit a significant frequency-dependent degradation enhancement. Approximate analytical expressions of the interface trap generation for devices under the static, unipolar, or bipolar stress are derived in the framework of conventional reaction-diffusion (R-D) model and with an assumption that additional interface traps (N*it) are generated in each cycle of the dynamic stress. The additional interface trap generation is proposed to originate from the transient trapped carriers in the states at and/or near the SiO2/Si interface upon the gate voltage reversal from the accumulation bias to the inversion bias quickly, which may accelerate dissociation of Si-H bonds at the beginning of the stressing phase in each cycle. Hence, N*it depends on the interface-state density, the voltage at the relaxation (i.e., accumulation) bias, and the transition time of the stress waveform (the fall time for pMOSFETs and the rise time for nMOSFETs). The observed dynamic BTI behaviors can be perfectly explained by this modified R-D model.
掲載誌名
IEEE Transactions on Electron Devices
53巻
8号
開始ページ
1805
終了ページ
1814
出版年月日
2006-08
出版者
IEEE
ISSN
0018-9383
NCID
出版者DOI
言語
英語
NII資源タイプ
学術雑誌論文
広大資料タイプ
学術雑誌論文
DCMIタイプ
text
フォーマット
application/pdf
著者版フラグ
publisher
権利情報
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関連情報URL
部局名
ナノデバイス・システム研究センター