Atomic-layer-deposited silicon-nitride/SiO2 stacked gate dielectrics for highly reliable p-metal–oxide–semiconductor field-effect transistors

Applied Physics Letters 77 巻 18 号 2855-2857 頁 2000-10-30 発行
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タイトル ( eng )
Atomic-layer-deposited silicon-nitride/SiO2 stacked gate dielectrics for highly reliable p-metal–oxide–semiconductor field-effect transistors
作成者
Yoshimoto Takashi
Kidera Toshiro
Obata Katsunori
Sunami Hideo
Hirose Masataka
収録物名
Applied Physics Letters
77
18
開始ページ 2855
終了ページ 2857
抄録
An extremely thin (~0.4 nm) silicon-nitride layer has been deposited on thermally grown SiO2 by an atomic-layer-deposition (ALD) technique. The boron penetration through the stacked gate dielectrics has dramatically been suppressed, and the reliability has been significantly improved, as confirmed by capacitance–voltage, gate-current–gate-voltage, and time-dependent dielectricbreakdown characteristics. The ALD technique allows us to fabricate an extremely thin, very uniform silicon-nitride layer with atomic-scale control.
言語
英語
資源タイプ 学術雑誌論文
出版者
American Institute of Physics
発行日 2000-10-30
権利情報
Copyright (c) 2000 American Institute of Physics.
出版タイプ Version of Record(出版社版。早期公開を含む)
アクセス権 オープンアクセス
収録物識別子
[ISSN] 0003-6951
[DOI] 10.1063/1.1320847
[NCID] AA00543431
[DOI] http://dx.doi.org/10.1063/1.1320847